Analysis of a CMOS-Compatible Vertical Bipolar Transistor
نویسندگان
چکیده
A vertical npn bipolar transistor (BJT) which can be manufactured in a simple pwell CMOS process without additional process steps is described. The proposed BJT uses a p-well as base and an n+ S/D doping as emitter. The collector consists of the nsubstrate and does not require an nf buried layer or a highly doped substrate. The device is especially suitable for high-voltage applications in electrically hostile environments such as automotive circuits.
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